EVERY MILLIWATTENGINEEREDWITH INTENT.
From 100 mV harvested solar to 480 V three-phase—power designed for the real world.
A switching supply that radiates into your RF front-end, a BMS that miscalculates SoC under temperature extremes, or an inrush peak that trips a circuit breaker can render an otherwise excellent product unusable. Ankh designs precision SMPS topologies, battery management systems, and energy harvesting converters that meet performance specifications across the full operating envelope while passing FCC and CE conducted emissions limits on the first attempt—because EMI compliance is designed in from the first inductor placement.
What We Design
SMPS Topology Selection & Design
Topology selection across non-isolated (buck, boost, SEPIC, Cuk), isolated single-switch (flyback, forward), and isolated resonant (LLC, CLLC) architectures — with magnetics specification, type II/III control loop compensation, and protection circuit design.
Battery Management Systems (BMS)
BMS for Li-ion (NMC, NCA, LCO), LiFePO4, NiMH, and primary lithium — cell monitoring, protection, passive and active balancing, and SoC/SoH estimation using TI BQ, ADI LTC, or Renesas ISL ICs. Safety designs comply with IEC 62133, UL 2054, and UN 38.3.
Switching Regulator Design & Magnetics
Duty-cycle and frequency selection, inductor sizing for DCM/CCM ripple, capacitor selection for ESR-limited ripple, bootstrap and gate drive, and voltage- or current-mode loop compensation targeting 45°–60° phase margin via Bode plot analysis.
State-of-Charge Gauging & Impedance Spectroscopy
Coulomb counting with OCV-based drift correction and Thevenin/Randles ECM estimation parameterized by EIS; SoH tracking via incremental capacity analysis detecting fade patterns specific to each cell chemistry.
Wireless Charging (Qi/WPC) Design
Qi 1.3/2.0 (up to 60W) transmitter coil design, resonant circuit tuning, FOD, power transfer protocol, synchronous rectifier topology, DC-DC post-regulation, and WPC in-band signaling firmware.
Energy Harvesting & Solar Power Conditioning
P&O or incremental conductance MPPT for PV, TEG, piezoelectric, and RF-to-DC sources on TI MSP430/Ambiq Apollo at sub-1 µA sleep — with supercapacitor buffer sizing, cold-start circuitry, and indoor amorphous silicon operation at 200–1000 lux.
Hot-Swap, Inrush Limiting & Protection Circuits
TI TPS2490/ADI LTC4222 hot-swap controllers or discrete MOSFET slew-rate designs with current sense amplifiers and fault timers; P-channel reverse polarity protection, ideal diode OR-ing for redundant supplies, and load-switch sequencing.
EMI Filter Design for Switching Supplies
DM and CM noise separated via LISN; LC filter stages sized for required attenuation at switching frequency and harmonics, with parasitic-aware design (capacitor ESL, inductor SRF) and Y-capacitor leakage verified against IEC 62368-1 touch-current limits.
How We Work
Power Architecture Definition
We build a complete power budget across every operating mode—active, sleep, standby, and peak load—then construct a power tree defining conversion stages, sequencing, and protection domains. Architecture decisions (isolated vs. non-isolated, switching frequency, centralized vs. distributed) are documented with trade-off rationale before PCB design begins.
Topology Selection & Component Sizing
Topology selection weighs input range, isolation needs, efficiency targets, and EMI constraints; components are sized using worst-case analysis — maximum duty cycle, DCM/CCM boundary, output ripple at maximum ESR, and switch voltage stress. All selected parts are verified against distributor stock with two qualified alternates.
Magnetics Design & Simulation
Custom magnetics are designed using Steinmetz core-loss modeling and Dowell proximity-effect analysis when off-the-shelf components cannot meet density, efficiency, or form-factor requirements. SPICE simulation of the complete power stage—including parasitics—verifies steady-state operation, control loop stability via AC small-signal analysis, and soft-start behavior.
PCB Layout for Power & EMI
Layout proceeds hierarchically — primary switching loop area minimized first, high-frequency return currents routed away from analog circuitry, signal traces separated from switching nodes. Filter components land at PCB entry/exit points with line-side ground connections to prevent conducted emissions from bypassing the filter.
Bench Characterization & Compliance Testing
Efficiency (Yokogawa WT310), thermal imaging at full load, and Bode 100 phase-margin measurement on real hardware characterize each design before lab submission. Conducted emissions pre-compliance sweeps verify CISPR 32 or EN 55032 margin and resolve failures before the formal accredited lab run.
Production Release & Manufacturing Support
Production release includes component tolerance analysis (±1% resistors, ±20% ceramic capacitors at rated voltage), magnetics manufacturing drawings, and derived production test limits for frequency, regulation, and efficiency. We provide on-call support during CM pilot builds to resolve sourcing substitutions and assembly anomalies.
Power Systems Engineered for the Real World
LLC Resonant Converter Design: From Tank Circuit to PFC
LLC resonant converters achieve ZVS for primary FETs and ZCS for secondary rectifiers above 300 kHz. Tank parameters (Lr, Cr, Lm) are selected via FHA; tolerances evaluated statistically for worst-case ZVS; transformer leakage inductance characterized on prototype before control loop design.
Electronics DesignBattery Management: Chemistry, SoC, and Thermal Safety
Ankh characterizes each cell model's actual impedance, fade trajectory, and temperature response before designing protection thresholds and balancing strategy. For UN 38.3, IEC 62133-2, and UL 2054, protection thresholds, timing delays, and fault latch behavior are designed explicitly to pass nail-penetration, forced-discharge, and short-circuit tests.
Power MonitoringConducted Emissions Compliance for SMPS: CE Mark & FCC
DM and CM noise are separated using a current probe and LISN before filter design, with each stage sized against the actual noise spectrum. Filter insertion loss is verified against the real filter impedance, accounting for component parasitics, before accredited lab submission.
Regulatory & Certification
From 100 mV harvested solar to 480 V three-phase—power designed for the real world.
Power Systems Across Ankh's Product Range
From sub-µA wearable standby to 4 kV isolated industrial supplies, Ankh's power systems engineers have designed compliant, efficient power for every product category.
Wearable Electronics
Ultra-low-quiescent LDO and buck, single-cell Li-ion BMS with USB-C PD, sub-100 nA sleep
View ProductMedical Devices
IEC 60601-1 2xMOPP AC-DC isolation, patient leakage <10 µA, battery backup switchover
View ProductCold-Chain Monitoring
TEG energy harvesting, 5-year primary lithium life modeling, -40 °C Li discharge compensation
View ProductIndustrial Equipment Monitoring
9–60 VDC isolated flyback, 4 kV reinforced isolation, IEC 61000-4-5 surge immunity
View ProductAI Vision Systems
Point-of-load PMIC for >10 A NPU transients, phase-interleaved buck, thermal-aware voltage scaling
View ProductWireless Communication
PA supply optimization for PAE, envelope tracking, cellular modem inrush management
View ProductStructural Monitoring
Solar + supercapacitor hybrid, MPPT at 200–1000 lux, -40 °C cold-start design
View ProductPower Monitoring
CT self-powered, burden circuit for 100 mA–100 A, revenue-grade metrology isolation
View ProductSmart Home Automation
No-neutral high-voltage flyback for switch-box, standby <75 mW for ErP compliance
View ProductRuggedized Devices
-55 °C to +125 °C capacitor derating, MIL-STD-704 28 VDC input, TVS coordination
View ProductData Loggers
Multi-year Li AA life modeling, SRAM backup power, USB self-powered vs. bus-powered switching
View ProductPOS & Kiosk Hardware
20 ms power-fail holdup for key zeroization, ATX sequencing, PCI-PTS tamper-detect power
View ProductFirst-Principles Magnetics Design—Not Just IC Selection
Reference-design power engineering fails for unusual input ranges, tight efficiency targets, or stringent EMI. Magnetics from first principles using improved Steinmetz and Dowell proximity-effect analysis routinely hits efficiency targets that reference designs miss by 3–5%.
Control Loop Analysis on Real Hardware—Every Design
Open-loop gain and phase is measured on every design using a Bode 100, targeting 45°–65° phase margin and >10 dB gain margin across all input and load conditions — exposing oscillations that static bench loads cannot reveal.
EMI Designed In From Topology Selection—Not Filtered Out Afterward
Switching frequencies place harmonics in limit gaps, primary current loop area is minimized, and gate resistors sized for dV/dt control — the filter addresses residual noise, not the source. Filter values are characterized against actual source/load impedances and capacitor SRF.
Deliverables
Power Architecture Document
Power tree, per-mode power budget, sequencing timing diagram, and topology rationale covering isolation strategy and frequency choice.
Schematic with Annotated Component Rationale
Schematic with component values annotated for operating points, stress levels, and derating ratios, plus worst-case tolerance analysis on critical regulation and timing circuits.
Magnetics Design Specification
Core selection, turns ratio, winding configuration, bobbin drawing, gap specification, and expected Ls, Lm, DCR, and core loss for vendor quotation.
SPICE Simulation Report
Steady-state waveforms, transient load step, startup sequence, and AC Bode plot at minimum and maximum input voltage.
Bench Characterization Report
Efficiency curves at 25°C and 85°C, thermal IR images at full load, transient waveforms, and Bode measurements confirming phase and gain margin.
Conducted Emissions Pre-Compliance Data
LISN-measured conducted sweeps against CISPR 32 Class B / EN 55032 with DM/CM separation and filter insertion loss verification.
BMS Protection & Gauging Specification
Protection threshold table, balancing strategy, SoC algorithm description, temperature compensation curves, and safety test plan for IEC 62133 and UL 2054.
Production Test Limits & Procedure
Test limits for switching frequency, output voltage regulation, efficiency, and protection threshold verification with step-by-step procedure.
All power systems deliverables include worst-case analysis documentation supporting safety certification and component derating reviews required by UL, CE LVD, and IEC 60601 auditors.
Often Paired With Power Systems
Electronics Design
Power and electronics design co-developed so layout rules, thermal management, and decoupling strategies are consistent across the board.
ExploreRegulatory & Certification
EMI filter designs and pre-compliance data feed directly into FCC Part 15B and CE certification campaigns.
ExploreFirmware Development
BMS gauging algorithms, MPPT loops, and power-sequencing state machines implemented using power design documentation.
ExploreSystems Integration
Power rail validation and load transient characterization built into board bring-up without handoff overhead.
ExploreWork That Demonstrates the Standard
Outdoor IoT Node: Solar + Supercapacitor Hybrid Powers 6-Month Deployments
Ankh designed a 2 W amorphous silicon panel, 100 F supercapacitor, and P&O MPPT on TI MSP430 at 900 nA standby — sized for 14-day zero-solar autonomy, validated at 200–100,000 lux. A 90-day field trial across 12 nodes confirmed the energy model within 4% and CISPR 32 Class B with 8 dB margin.
Read the Case StudyMedical Device AC-DC Supply: IEC 60601-1 2xMOPP Isolation at 95% Efficiency
Ankh designed a 45 W PFC + LLC half-bridge supply with 4 kV dielectric withstand and 8 mm creepage via triple-insulated winding (IEC 60601-1 2xMOPP). Patient leakage measured 8.3 µA at single-fault (limit: 10 µA), peak efficiency 95.2% at 50% load, conducted emissions passing EN 55032 Class B with 10 dB margin.
Read the Case StudyReady to Power Your Product Right—From Day One?Efficient, compliant, and safe—engineered from first principles.
Bring your power budget and Ankh will identify efficiency and EMI risks before they reach the bench.