KNOW EXACTLYWHAT YOU AREACQUIRING
Independent technical assessment of hardware product companies for investors and acquirers.
Ankh provides the independent, practitioner-level assessment investors and acquirers need before committing capital: hardware architecture and schematic review, firmware codebase evaluation, IP ownership verification, regulatory compliance gap analysis, manufacturing readiness with PFMEA and DFM audit, GPL contamination audit, security architecture review, and NRE and COGS validation — with prototype-to-production risk scoring and a prioritized findings report.
What We Assess
Hardware Architecture Review
Power sequencing, decoupling adequacy, signal integrity margin, PCB stack-up, impedance-controlled routing, and BOM single-source dependency — with prototype-to-production gap assessment and estimated effort to close blocking findings.
Firmware Codebase Assessment
Code structure, static analysis finding density, test coverage (unit, integration, HIL), dependency CVE exposure, build system reproducibility, and documentation adequacy — characterizing maintenance burden and scalability for planned product iterations.
IP Ownership Verification
IP chain from inventors through assignment agreements: founder assignments, contractor work-for-hire, prior employer IP review, patent application status, and trade secret identification — IP ownership gaps are among the most common deal-stopper findings in hardware acquisitions.
Regulatory Compliance Gap Analysis
Certification status mapped against requirements for all target markets (FCC/ISED, CE, UL/CSA, FDA 510(k), UKCA, RoHS, REACH) — gap findings, severity, cost and timeline estimates, and pre-submission documentation quality assessment.
Manufacturing Readiness Assessment
BOM supplier qualification, alternate source availability, DFM audit findings, PFMEA process risk, production test coverage, yield history, and CM relationship maturity — assessing whether the product can scale or requires significant engineering first.
Third-Party IP License Audit
GPL, LGPL, and AGPL dependency audit — GPL contamination in proprietary firmware creates material IP risk for acquirers who cannot distribute source code; all copyleft-licensed dependencies are identified with exposure assessment.
Security Architecture Review
Secure boot status, device authentication, transport security, OTA security controls, and key storage — assessed against OWASP IoT Top 10 with findings prioritized by post-acquisition liability and emergency response risk.
NRE & COGS Modeling Validation
Independent validation against manufacturing database and component pricing — identifying underestimated certification costs, optimistic yield assumptions, missing tooling NRE, and COGS models missing component re-selection or BOM optimization savings.
Technical Team Capability Assessment
Key-person concentration risk, which capabilities are documented for transfer, whether the team can execute the planned roadmap with current headcount, and critical hiring needs identified.
How We Work
Scope Definition & Data Room Access
Scope is defined against transaction type, deal timeline, and investor concerns; the data room artifact list — schematics, Gerbers, BOM, firmware repository, certifications, and IP assignment agreements — is agreed before access is granted. Deliverable format and timeline are established upfront.
Hardware & Electronics Review
Power architecture, signal integrity, protection circuit adequacy, DFT provisions, BOM single-source risk, and PCB stack-up impedance quality are evaluated. Findings are categorized by severity (blocking, significant, minor, informational) with evidence references to schematic sheets, BOM line items, and netlist data.
Firmware & Software Codebase Review
Static analysis, CVE dependency scanning, and test coverage metrics precede manual review of highest-risk areas: bootloader security, RTOS MPU configuration, safety-relevant error handling, and build system reproducibility. Hardcoded credentials are a recurring high-severity finding in authentication implementation reviews.
IP & Regulatory Assessment
IP audit covers chain of title — founder and employee assignments, prior employer IP clauses, contractor work-for-hire, and patent prosecution status. Regulatory gap analysis maps current certifications against required market certifications with cost and timeline estimates from direct experience with equivalent product categories.
Manufacturing & Commercial Readiness
DFM audit status, PFMEA, production test maturity, yield data, and CM qualification are reviewed alongside supply chain resilience. COGS is validated against a manufacturing cost database — common findings include volume pricing gaps on passives, missing tooling NRE, and yield assumptions from prototype batches.
Risk Scoring & Report Delivery
Findings are consolidated into a risk-scored report with an executive summary, traffic-light domain scores, and a prioritized remediation roadmap with cost and timeline per category. A structured briefing covers every finding with data room evidence defensible under challenge from the target's management.
The Technical Evidence Behind Investment Decisions
Hardware Architecture: What Schematics Reveal
Common high-severity findings: power sequencing race conditions causing undefined startup at temperature extremes, missing bulk decoupling that will fail FCC/CE testing, GPIO inputs floating in ESD events, and single-source IC dependencies with 52-week lead times. PCB stack-up analysis reveals whether return current paths were understood — all representing concrete, estimable engineering costs.
Electronics DesignGPL Contamination: A Hardware Company's Hidden Risk
A GPLv2-licensed RTOS without the required source disclosure mechanism transfers that obligation to every acquirer — potentially requiring publication of core firmware IP. All copyleft components are identified using FOSSology and SPDX SBOM analysis plus manual build-system review; remediation options (relicensing, permissive alternatives, GPL exception) are assessed and costed.
Firmware DevelopmentPrototype-to-Production Risk Scoring
Component tolerance stacking, EMC failures requiring PCB redesign, DFM issues blocking automated assembly, and thermal performance adequate at 25°C but failing at 60°C are concrete capital costs invisible to financial models. Risk is scored across five dimensions (design maturity, manufacturing process maturity, regulatory readiness, supply chain resilience, cost model accuracy) with quantitative evidence.
Rapid Prototyping
Independent technical assessment of hardware product companies for investors and acquirers.
Technical Due Diligence Across Every Hardware Category
Due diligence risk profiles differ substantially by product category—from FDA 510(k) gaps in medical devices to functional safety SIL requirements in industrial equipment—and Ankh has the domain expertise to assess each correctly.
Medical Devices
FDA 510(k)/De Novo gap analysis, IEC 62304 software lifecycle assessment, 21 CFR Part 11 compliance review
View ProductWearable Electronics
FCC/IC/CE radio certification status, battery safety (UN38.3) documentation, IP rating validation
View ProductIndustrial Equipment Monitoring
IEC 61010 safety certification, ATEX/IECEx for hazardous location deployments, functional safety SIL assessment
View ProductCold Chain Monitoring
Sensor calibration traceability, data integrity audit, chain-of-custody regulatory compliance for pharma
View ProductAI Vision Systems
Model IP ownership and training data license audit, EU AI Act compliance assessment for high-risk AI systems
View ProductPOS & Kiosk Hardware
PCI PTS certification status, EMV L1/L2 qualification, payment application security code review
View ProductWireless Communication
FCC Part 15/Part 90 certification, spectrum license review, radio module integration compliance assessment
View ProductSmart Home Automation
Matter/Thread certification status, Works with Alexa/HomeKit compliance, low-voltage safety certification
View ProductPower Monitoring
UL 916 energy management system standard, electrical safety certification for mains-connected products
View ProductRuggedized Devices
MIL-STD-810 test report review, IP rating test certificate validation, drop/shock test data assessment
View ProductPractitioner Reviewers, Not Process Auditors
Power sequencing race conditions, EMC gaps, and firmware security flaws are only visible to engineers who have debugged these failure modes on real hardware — producing findings that are actionable, cost-estimated, and invisible to process-only auditors.
Full-Stack Hardware Due Diligence
Cross-domain causality is lost when domains are subcontracted separately. All six domains (electronics, firmware, software, manufacturing, regulatory, IP) are covered by one integrated team, producing a report that reflects the product as a system.
Investment-Grade Evidence and Defensible Findings
Every finding cites specific evidence — schematic sheet and net, code file and line, BOM line item — independently verifiable and defensible under challenge. COGS modeling is grounded in a manufacturing cost database; regulatory gap estimates come from direct experience with comparable products.
Deliverables
Executive Risk Scorecard
Traffic-light risk scoring across hardware, firmware, IP, regulatory, manufacturing, and security — formatted for investment committee presentation with narrative explanation.
Hardware Architecture Findings Report
Schematic and PCB findings by severity with evidence references, prototype-to-production gap assessment, DFM findings, and estimated cost to resolve blocking issues.
Firmware & Software Assessment Report
Static analysis results, dependency vulnerability findings, test coverage analysis, architecture assessment, and GPL/copyleft contamination report with remediation options.
IP Ownership Audit Report
Chain-of-title assessment, assignment agreement gaps, prior employer IP risk, patent portfolio scope, and trade secret protection adequacy review.
Regulatory Compliance Gap Analysis
Certification status mapped against requirements for all target markets, gap findings with severity, cost and timeline estimates, and pre-submission documentation quality assessment.
Manufacturing Readiness Assessment
PFMEA review, DFM audit findings, yield data analysis, CM qualification status, supply chain resilience, and critical component single-source risk inventory.
COGS & NRE Validation Model
Independent COGS model at target volume with variance analysis against company projections, NRE gap identification, and sensitivity analysis for yield variation and component substitutions.
Prioritized Remediation Roadmap
Findings consolidated into a prioritized roadmap with cost, timeline, and responsible discipline — distinguishing pre-close conditions from post-close integration activities.
All due diligence deliverables are delivered within the agreed timeline and include executive summary materials suitable for investment committee presentation and detailed technical annexes for engineering-level review.
Often Paired With Technical Due Diligence
Regulatory Certification
Post-diligence regulatory certification execution to close the compliance gaps identified in the assessment.
ExploreElectronics Design
Hardware redesign to address schematic and PCB findings identified during due diligence review.
ExploreFirmware Development
Firmware refactoring and hardening to address codebase quality and security findings from the assessment.
ExploreSustaining Engineering
Post-acquisition sustaining engineering to maintain and improve the product while the acquirer's team ramps up.
ExploreWork That Demonstrates the Standard
Series B Due Diligence: Medical IoT Wearable
Ankh's review of a $22M Series B medical IoT wearable surfaced three deal-altering findings: a power sequencing vulnerability causing cold-temperature lockups; GPLv2 contamination in the Bluetooth stack incompatible with the proprietary distribution model; and a 510(k) submission excluding a software module added in the latest hardware revision — supporting a $4.2M valuation adjustment resolved before close.
Read the Case StudyM&A Technical Assessment: Industrial Monitoring Platform
Ankh assessed seven hardware SKUs, a 340,000-line firmware codebase, a cloud API platform, and 12 patent applications for a $65M industrial automation acquisition — surfacing two SKUs with EOL IC dependencies requiring 12-month redesigns, 78% of codebase from one author outside the retention package, and the platform hosted on personal AWS accounts. The report included a 14-month post-close integration roadmap used directly in the acquirer's 100-day plan.
Read the Case StudyReady to know exactly what you are investing in?Technical risk is the risk financial models cannot see. We make it visible.
Ankh provides practitioner-level technical due diligence for venture funds, growth equity firms, and strategic acquirers — tell us your deal timeline and we will scope the engagement.